Predoctoral Appointee - Data Reduction with ASIC AI Accelerators
Argonne National Laboratory
Lemont, USA
Job posting number: #7234030 (Ref:417857)
Posted: April 2, 2024
Job Description
The Advanced Photon Source (APS) (https://www.aps.anl.gov/) and Mathematics and Computer Science (https://www.anl.gov/mcs) at Argonne National Laboratory (Lemont, Illinois, US (near Chicago)) invites applicants for a pre-doctoral position to develop data reduction methods with low-latency ASIC AI accelerators. At Argonne, we have demonstrated millisecond-scale data reduction using networked, commodity edge processing units (https://www.nature.com/articles/s41467-023-41496-z). This new project aims to develop low-latency (microsecond-scale) data reduction methods to run on state-of-art ASIC AI accelerators which are tightly coupled to scientific detectors. Such as a workflow will enable on-the-fly scientific data analysis, autonomous experiments, and instrument tuning. Finally, the project aims to architect a detector system with an edge co-processor chiplet and high bandwidth memory using interposer technologies. In conjunction, the project aims to develop compression algorithms based on physics-informed neural networks (PINN) that are trained to recognize the noise distribution in detector images.
The successful candidate will be part of an international, highly inter-disciplinary team of experts in ASIC and FPGA design, data reduction and X-ray detector development. The appointee will benefit from access to world-leading experimental and computational resources at Argonne including some of the world’s largest supercomputers (Polaris, Aurora) and one of the brightest synchrotron x-ray sources in the world (APS-U).
Position Requirements
Required Knowledge, Skills and Experience:
Master's degree in electrical engineering, computer engineering, machine learning, computational physics, image processing, x-ray science or a related field
Combination of expertise with computing/software and digital logic (firmware) design from the algorithmic level to the hardware implementation.
Knowledge of digital logic designs (RTL) using System Verilog.
Python programming.
Experience with building digital test-benches and carry-out digital circuit simulations.
Ability to work effectively as a member of a team.
Ability to effectively communicate with people of diverse backgrounds and skill sets.
Understand, value, and promote diversity.
Ability to model Argonne’s core values of impact, safety, respect, integrity, and teamwork.
Preferred Knowledge, Skills and Experience:
Advanced digital verification techniques using System Verilog and UVM methodologies.
Experience working with Scala, Chisel and FIRRTL methodology.
Experience with deep learning libraries (Keras, Tensorflow, PyTorch etc.)
Experience with FPGA designs.
Job Family
Temporary FamilyJob Profile
Predoctoral AppointeeWorker Type
Long-Term (Fixed Term)Time Type
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